MAX2769
Universal GPS Receiver
Preconfigured Device States
When a serial interface is not available, the device can
be used in preconfigured states that don’t require pro-
gramming through the serial interface. Connecting the
PGM pin to logic-high and SCLK, SDATA, and CS pins
to either logic-high or low sets the device in one of the
preconfigured states according to Table 3.
Serial Interface, Address,
and Bit Assignments
A serial interface is used to program the MAX2769 for
configuring the different operating modes.
Table 3. Preconfigured Device States
The serial interface is controlled by three signals: SCLK
(serial clock), CS (chip select), and SDATA (serial data).
The control of the PLL, AGC, test, and block selection is
performed through the serial-interface bus from the base-
band controller. A 32-bit word, with the MSB (D27) being
sent first, is clocked into a serial shift register when the
chip-select signal is asserted low. The timing of the inter-
face signals is shown in Figure 4 and Table 4 along with
typical values for setup and hold time requirements.
DEVICE ELECTRICAL CHARACTERISTICS
3-WIRE CONTROL PINS
0
1
2
3
4
5
6
7
16.368
16.368
16.368
32.736
19.2
18.414
13
16.368
16
16
16
32
96
18
65
16
1536
1536
1536
1536
7857
1539
7857
1536
I
I
I
I
I
I
I
I
1
1
2
2
2
2
2
1
Differential
Differential
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
4.092
4.092
4.092
4.092
4.092
1.023*
4.092
4.092
5th
3rd
5th
5th
5th
5th
5th
5th
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
*If the IF center frequency is programmed to 1.023MHz, the filter passband extends from 0.1MHz to 2.6MHz.
CS
t CSH
SCLK
t CSS
t CSW
t DS
t DH
t CH
t CL
SDATA
DATA
MSB
DATA
LSB
ADDR
MSB
ADDR
LSB
Figure 4. 3-Wire Timing Diagram
Maxim Integrated
15
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